CMOS Inverter Schematic to Layout 3D

Click any wire, terminal or device in the schematic and the same net or region is highlighted in the top view and in the 3D structure — and the reverse. Drag to rotate, scroll to zoom, shift-drag to pan.

Schematic

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Layers

Top view — A–A′ is the cut taken through the 3D structure below

3D structure — built from the A–A′ section, following the mask layout

Metal 1 Contacts Oxide over silicon Poly + gate oxide Field oxide n⁺ / p⁺ n-well + substrate Explode

The two teal annotation boxes on the source slide are not reproduced — the figure doesn't say what they mark. Everything else follows the given layout: two contacts on each supply-side diffusion, one on each drain, one poly strip forming both gates, Out metal bridging the two drains over the field oxide, and the n-well enclosing the PMOS only.